View BU-61588_240350.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

BU-65178/65179*/61588/61688*/61689*
MINIATURE ADVANCED COMMUNICATION ENGINE (MINI-ACE) AND MINI-ACE PLUS*
Make sure the next Card you purchase has...
(R)
FEATURES
* 5 Volt Only * Fully Integrated MIL-STD-1553 A/B
STANAG 3838 Compliant Terminals
* One-Square-Inch Package * Smallest BC/RT/MT In The Industry * Hardware and Software
Compatible with BU-61580 ACE Series
* Flexible Processor/Memory
Interface
* Bootable RT* Option * 4K x 16 or 64K x 16* Shared RAM
DESCRIPTION
The BU-61588 Mini-ACE and BU-61688 Mini-ACE Plus* integrates two 5-volt-only transceivers, protocol, memory management, processor interface logic, and 4K x 16, or 64K x 16* words of RAM in a choice of pin grid array (PGA), quad flat pack or gull lead packages. The Mini-ACE is packaged in a 1.0 square inch, low profile, cofired ceramic multi-chip-module (MCM) package making it the smallest integrated MIL-STD-1553 BC/RT/MT in the industry. The Mini-ACE provides full compatibility to DDC's BU-61580 and BU-65170 Advanced Communication Engine (ACE). As such, the Mini-ACE includes all the hardware and software architectural features of the ACE. The Mini-ACE contains internal address latches and bidirectional data buffers to provide a direct interface to a host processor bus. The memory management scheme for RT mode provides three data structures for buffering data. These structures, combined with the Mini-ACE's extensive interrupt capability, serve to ensure data consistency while off-loading the host processor. The Mini-ACE Plus* can optionally boot-up as a RT with the Busy bit set for 1760 applications. The Mini-ACE BC mode implements several features aimed at providing an efficient real-time software interface to the host processor including automatic retries, programmable intermessage gap times, automatic frame repetition, and flexible interrupt generation. The advanced architectural features of the Mini-ACE, combined with its small size and high reliability, make it an ideal choice for demanding military and industrial processor-to-1553 applications.
* Automatic BC Retries * Programmable BC Gap Times * Programmable Illegalization * Simultaneous RT/Monitor Mode * Operates From 10*/12 /16 / 20* MHz
Clock
FOR MORE INFORMATION CONTACT:
Data Device Corporation 105 Wilbur Place Bohemia, New York 11716 631-567-5600 Fax: 631-567-7358 www.ddc-web.com
Technical Support: 1-800-DDC-5757 ext. 7771
All trademarks are the property of their respective owners. (c) 1998, 1999 Data Device Corporation
Data Device Corporation www.ddc-web.com
4K X 16 OR 64K X 16 SHARED RAM
TX/RX_A
*
CH. A
TRANSCEIVER A
TX/RX_A DUAL ENCODER/DECODER, MULTIPROTOCOL AND MEMORY MANAGEMENT ADDRESS BUS ADDRESS BUFFERS
DATA BUS
DATA BUFFERS
D15-D0
PROCESSOR DATA BUS
TX/RX_B
A15-A0
PROCESSOR ADDRESS BUS
2
TRANSCEIVER B TRANSPARENT/BUFFERED, STRBD, SELECT, RD/WR, MEM/REG, TRIGGER_SEL/MEMENA-IN, MSB/LSB/DTGRT PROCESSOR AND MEMORY INTERFACE LOGIC IOEN, READYD ADDR_LAT/MEMOE, ZERO_WAIT/MEMWR, 8/16-BIT/DTREQ, POLARITY_SEL/DTACK INT PROCESSOR AND MEMORY CONTROL INTERRUPT REQUEST RTAD4-RTAD0, RTADP CLK_IN, MSTCLR,SSFLAG/EXT_TRG
CH. B
TX/RX_B
RT ADDRESS
RT_AD_LAT
MISCELLANEOUS
BU-65178/65179*/61688*/61689* K-04/05-0
FIGURE 1. BU-65178/65179*/61588/61688*/61689*
TABLE 1. BU-65178/65179*/61588/61688*/61689* SPECIFICATIONS
PARAMETER ABSOLUTE MAXIMUM RATING Supply Voltage Logic +5 V Transceiver +5 V (Note 12) Logic Voltage Input Range RECEIVER Differential Input Resistance (Notes 1-7) Differential Input Capacitance (Notes 1-7) Threshold Voltage, Transformer Coupled, Measured on Stub Common Mode Voltage (Note 7) TRANSMITTER Differential Output Voltage Direct Coupled Across 35 , Measured on Bus Transformer Coupled Across 70 , Measured on Bus: * Standard Product = - XX0 * 1760 Amplitude Compliant Product = - XX2 ( Note 13 and Ordering Information - Test Criteria) Output Noise, Differential (Direct Coupled) Output Offset Voltage, Transformer Coupled Across 70 ohms Rise/Fall Time LOGIC VIH VIL IIH (Vcc = 5.5 V, VIN = Vcc) IIH (Vcc = 5.5 V, VIN = 2.7 V) SSFLAG/EXT_TRIG All Other Inputs IIL (Vcc = 5.5 V, VIN = 0.4 V) SSFLAG/EXT_TRIG All Other Inputs VOH (Vcc = 4.5 V, VIH = 2.7 V, VIL = 0.2 V, IOH = max) VOL (Vcc = 4.5 V, VIH = 2.7 V, VIL = 0.2 V, IOL = max) IOL DB15-DB0 A15-A0 MEMOE/ADDR_LAT MEMWR/ZEROWAIT DTREQ/16/8 DTACK/POLARITY_SEL INT READYD IOEN IOH DB15-DB0 A15-A0 MEMOE/ADDR_LAT MEMWR/ZEROWAIT DTREQ/16/8 DTACK/POLARITY_SEL INT READYD IOEN CI (Input Capacitance) CIO (Bi-directional signal input capacitance) MIN TYP MAX UNITS
TABLE 1. BU-65178/65179*/61588/61688*/61689* SPECIFICATIONS (CONT.)
PARAMETER 1553 MESSAGE TIMING Completion of CPU Write (BC Start)- to-Start of Next Message BC Intermessage Gap (Note 8) BC/RT/MT Response Timeout (Note 9) 18.5 nominal 22.5 nominal 50.5 nominal 128.0 nominal T Response Time (Note 11) Transmitter Watchdog Timeout POWER SUPPLY REQUIREMENTS Voltages/Tolerances BU-65178/61588X3 * +5 V (Logic) * +5 V (Ch. A, Ch. B) Current Drain (Total Hybrid) BU-65178/65179/61588X0 * +5 V (Logic) BU-65178/65179/61588X3 * +5 V (Logic, Ch. A, Ch. B) * Idle * 25% Transmitter Duty Cycle * 50% Transmitter Duty Cycle * 100% Transmitter Duty Cycle BU-61688*/61689X0* * +5 V (Logic) BU-61688*/61689X3* * +5 V (Logic, Ch. A, Ch. B) * Idle * 25% Transmitter Duty Cycle * 50% Transmitter Duty Cycle * 100% Transmitter Duty Cycle POWER DISSIPATION Total Hybrid BU-65178/65179/61588X0 * +5 V (Logic) BU-65178/61588/65179X3 * Idle * 25% Duty Cycle * 50% Duty Cycle * 100% Duty Cycle BU-61688*/61689X0* * +5 V (Logic) BU-61688*/61689X3* * Idle * 25% Duty Cycle * 50% Duty Cycle * 100% Duty Cycle Hottest Die BU-65178/61588X3/65179X3*/ BU-61688*/61689X3* * Idle * 25% Duty Cycle * 50% Duty Cycle * 100% Duty Cycle MIN TYP MAX UNITS
-0.3 -0.3 -0.3 2.5
6.0 7.0 Vcc+0.3
V V V kohm
2.5 9.5
s s s s s s s s
5 0.20 0 0.860 10
pF Vp-p Vpeak
17.5 18.5 21.5 22.5 49.5 50.5 127 129.5 4 668
19.5 23.5 51.5 131 7
6
7
9
Vp-p
4.5 4.75
5.0 5.0
5.5 5.25
V V
23
100
mA
18 20
21 22
27 27
Vp-p Vp-p
10 -250 100 2.0 -10 -692 -346 -794 -397 2.4 0.8 10 -84 -42 -100 -50 150 250 300
mVp-p, diff mV nsec V V A A A A A V V
116 222 328 540 46
160 265 370 580 200
mA mA mA mA mA
116 217 318 519
180 285 390 600
mA mA mA mA
0.115 0.64 0.93 1.22 1.81 0.230 0.64 0.93 1.22 1.80
0.5 0.88 1.11 1.33 1.97 1.0 0.99 1.22 1.45 1.90
W W W W W W W W W W
0.4
6.4
mA
3.2
mA
-6.4
mA
0.18 0.42 0.66 1.14
0.28 0.51 0.75 1.22
W W W W
-3.2
mA
* Mini-ACE PLUS with 64K Words of RAM. RAM impact to Power Supply is based on Host Processor activity; subtract 140 mA if Host is idle.
50 50
pF pF
Data Device Corporation www.ddc-web.com
3
BU-65178/65179*/61688*/61689* K-04/05-0
TABLE 1. BU-65178/65179*/61588/61688*/61689* SPECIFICATIONS (CONT.)
PARAMETER Frequency BU-61588/61688*/65178 * Default Mode * Software Programmable Option BU-61689* * Default Mode * Software Programmable Option BU-65179* * Pin Programmable Option Long Term Tolerance * 1553A Mode * 1553B Mode Short Term Tolerance, 1 second * 1553A Mode * 1553B Mode Duty Cycle * 16 MHz * 12 MHz * 10 MHz* * 20 MHz THERMAL Thermal Resistance, Junction-toCase, Hottest Die (JC) BU-65178/61588X3* Operating Junction Temperature Storage Temperature Lead Temperature (soldering, 10 sec.) PHYSICAL CHARACTERISTICS Size BU-65178/61588 P BU-65179*/61688*/61689* BU-65178/61588 F/G BU-65179*/61688*/61689* Weight BU-65178/61588 F/P/G BU-65179*/61688*/61689* MIN TYP MAX UNITS
Table 1 Notes (Cont.): (8) Typical value for minimum intermessage gap time. Under software control, may be lengthened to (65,535 s minus message time), in increments of 1 s. (9) Software programmable (4 options). Includes RT-to-RT Timeout (MidParity of Transmit Command to Mid-Sync of Transmitting RT Status). (10) For both +5 V logic and transceiver. +5 V for channels A and B. (11) Measured from mid-parity crossing of Command Word to mid-sync crossing of RT's Status Word. (12) External 10 F Tantalum and 0.1 F capacitors should be located as close as possible to Pins 20 and 72 on the Flat Package and Pins A9 and J3 on the PGA package, and 0.1 F at Pin 37/D3. (13) MIL-STD-1760 requires that the Mini-ACE produce a 20 Vp-p minimum output on the stub connection.
16 12 20 10 10/12/16/20
MHz MHz MHz MHz MHz
0.01 0.1 0.001 0.01 33 40 40 40 67 60 60 60
% % % % % % % %
-55 -65
6.8 150 150 +300
C/W C C C
1.0 X 1.0 X 0.150 (25.4 x 25.4 x 3.81) 1.0 X 1.0 X 0.155 (25.4 x 25.4 x 3.94)
in. (mm) in. (mm)
0.3 (9)
oz (g)
Notes: Notes 1 through 6 are applicable to the Receiver Differential Resistance and Differential Capacitance specifications: (1) Specifications include both transmitter and receiver (tied together internally). (2) Measurement of impedance is directly between pins TX/RX A(B) and TX/RX A(B) of the BU-65178/61588X3 hybrid. (3) Assuming the connection of all power and ground inputs to the hybrid. (4) The specifications are applicable for both unpowered and powered conditions. (5) The specifications assume a 2 volt rms balanced, differential, sinusoidal input. The applicable frequency range is 75 kHz to 1 MHz. (6) Minimum resistance and maximum capacitance parameters are guaranteed, but not tested, over the operating range. (7) Assumes a common mode voltage within the frequency range of dc to 2 MHz, applied to pins of the isolation transformer on the stub side (either direct or transformer coupled), referenced to hybrid ground. Use a DDC recommended transformer or other transformer that provides an equivalent CMRR.
Data Device Corporation www.ddc-web.com
4
BU-65178/65179*/61688*/61689* K-04/05-0
TABLE 2. BU-65178/65179*/61588/61688*/61689* PIN LISTINGS (QFP QUAD FLAT PACK, PGA-PIN GRID ARRAY AND GULL LEAD)
QFP PGA 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 B4 B5 C2 C3 C1 D2 D1 C4 E3 F2 E1 F3 G1 G4 G3 H1 A7 A8 J8 A9 J7 F1 J2 H5 H3 H4 G2 J5 J6 H6 G7 H2 H7 G8 H8 E8 D3 F8 G6 G9 J9 NAME MEM/REG MSTCLR A11 A10 TX/RX-A A08 TX/RX-A A14, See NOTE 1 A04 A03 A07 A02 TX/RX-B MEMOE/ADDR_LAT A00 TX/RX-B LOGIC GND LOGIC GND LOGIC GND +5V VCC2 RTAD2 A06 MEMWR/ ZEROWAIT DTREQ/16/8 Test Output (RX-B) Test Output (RX-B) A01 MEMENA_IN/ TRIGGER_SEL DTACK/ POLARITY_SEL CLOCK_IN RT_AD_LAT SSFLAG/EXT_TRIG RTAD0 RTAD3 RTAD4 D06 +5V VCC D01 D04 RTADP RTAD1 ** ** ** N/A F4 F5 F6 E5 ** ** ** ** QFP 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 ** PGA H9 F9 F7 G5 E7 E9 D7 B2 D9 B9 A2 D8 A1 C9 B8 C8 A3 B7 C7 C6 A6 A5 J1 A4 C5 B6 E2 J4 B3 B1 J3 D4 D5 D6 E4 E6 D00 D02 D03 D05 D08 D07 D13 D12 D14 D09 D11 D15 D10 TRANSPARENT/ BUFFERED READYD INT IOEN TX_INH_A TX_INH_B SELECT STRBD RD/WR DTGRT/MSB/LSB Test Output (RX-A) A15, See NOTE 1 Test Output (RX-A) A05 A09 A12, See NOTE 2 A13, See NOTE 3 +5V VCC1 TestOutput(A_RExt) Test Output (A_Test1) Test Output (AB_Test4) TestOutput(B_RExt) TestOutput (AB_Tstck) TestOutput (AB_Test2) TestOutput (AB_Test3) TestOutput (B_Test1) No Connect NAME
NOTES ** Note that the Test Output pins on the flat pack are pads located on the bottom of the package. 1. BU-65179*, A15/A14 pins are actually CLK SEL 1 / CLK SEL 0 respectively. 2. BU-65179*, A12 pin selects the RT_BOOT_L OPTIONAL MODE. 3. BU-65179*, A13 pin has no connection.
Data Device Corporation www.ddc-web.com
5
BU-65178/65179*/61688*/61689* K-04/05-0
2.000 0.015 (50.800 0.381) 1.000 SQ 0.010 (25.400 0.254)
0.500 0.005 (12.70 0.127)
0.200 0.005 (5.080 0.127)
0.100 DIA. (2.540) (see note 4)
P8 P4
P7 P3
P6 P2
P5 P1 1 72
INDEX DENOTES PIN NO. 1
0.018 0.002 0.050 0.005 (0.457 0.051) (1.270 0.127) VIEW "B"
VIEW "B" 0.850 0.008 (21.590 0.203)
VIEW "A"
BOTTOM VIEW
0.010 0.002 (0.254 0.051)
0.130 MAX (3.31)
0.050 0.005 (1.270 0.127)
0.035 0.005 (0.889 0.127) VIEW "A"
1.024 0.014 NOM. (26.010 0.356)
0.040 0.004 (1.016 0.102) 0.090 0.010 (2.286 0.254)
SIDE VIEW
Notes: 1) Dimensions are in inches (mm). 2) Package Material: Alumina (AL2O3) 3) Lead Material: Kovar, Plated by 50 in. minimum nickel under 60 in. minimum gold. 4) There are 8 test pads located on the bottom of the package. These pads are recessed so as not to interfere when mounting the hybrid.
FIGURE 2. BU-65178F / 65179F* /61588F /61688F*/61689F* MECHANICAL OUTLINE (QUAD FLAT PACK - QFP)
Data Device Corporation www.ddc-web.com 6 BU-65178/65179*/61688*/61689* K-04/05-0
0.800 0.005 (20.320 0.127)
0.100 0.005 (2.540 0.127)
9 8 7 6 5 4 3 2 1 JHGFEDCBA
0.070 0.005 (1.778 0.127)
0.070 0.005 (1.778 0.127)
BOTTOM VIEW
1.000 SQ 0.010 (25.400 0.254) 0.155 MAX (3.810)
0.180 0.008 (4.572 0.203)
0.018 0.002 (0.457 0.051)
Indicates Pin A1
TOP VIEW
SIDE VIEW
Notes: 1) Dimensions are in inches (mm). 2) Package Material: Alumina (AL2O3) 3) Lead Material: Kovar, Plated by 50 in. minimum nickel under 60 in. minimum gold.
FIGURE 3. BU-65178P / 65179P* /61588P /61688P*/61689P* MECHANICAL OUTLINE (PIN GRID ARRAY - PGA)
1.38 0.02 (35.05 0.51) 1.00 SQ 0.01 (25.40 0.25) 0.19 Ref (4.83 Ref)
0.100 DIA. (2.540) (see note 4)
P8 P4
P7 P3
P6 P2
P5 P1 1 72
Notes: 1) Dimensions are in inches (mm). 2) Package Material: Alumina (AL2O3) 3) Lead Material: Kovar, Plated by 50 in. minimum nickel under 60 in. minimum gold. 4) There are 8 test pads located on the bottom of the package. These pads are recessed so as not to interfere when mounting the hybrid.
VIEW "B" 0.850 0.008 (21.590 0.203)
BOTTOM VIEW
0.018 0.002 0.050 0.005 (0.457 0.051) (1.270 0.127) VIEW "B"
0.08 MIN FLAT (2.03)
INDEX DENOTES PIN NO. 1
0.012 R. MAX (0.305 R.) 0.010 0.002 (0.254 0.051)
0.130 MAX (3.31)
VIEW "A"
1.024 0.014 NOM. (26.010 0.356)
SIDE VIEW
0.050 0.005 (1.27 0.127)
0.05 MIN FLAT (1.27) 0.075 MAX FLAT (1.91)
0.006 -0.004,+0.010 (0.152 -0.100,+ 0.254) VIEW "A"
FIGURE 4. BU-65178G / 65179G* /61588G /61688G*/61689G* MECHANICAL OUTLINE (GULL LEAD)
Data Device Corporation www.ddc-web.com 7 BU-65178/65179*/61688*/61689* K-04/05-0
TRANSFORMERS
In selecting isolation transformers to be used with the Mini-ACE, there is a limitation on the maximum amount of leakage inductance. If this limit is exceeded, the transmitter rise and fall times may increase, possibly causing the bus amplitude to fall below the minimum level required by MIL-STD-1553. In addition, an excessive leakage imbalance may result in a transformer dynamic offset that exceeds 1553 specifications. The maximum allowable leakage inductance is 6.0 H, and is measured as follows: The side of the transformer that connects to the Mini-ACE is defined as the "primary" winding. If one side of the primary is shorted to the primary center-tap, the inductance should be measured across the "secondary" (stub side) winding. This inductance must be less than 6.0 H. Similarly, if the other side of the primary is shorted to the primary center-tap, the inductance measured across the "secondary" (stub side) winding must also be less than 6.0 H. The difference between these two measurements is the "differential" leakage inductance. This value must be less than 1.0 H. Beta Transformer Technology Corporation (BTTC), a subsidiary of DDC, manufactures transformers in a variety of mechanical configurations with the required turns ratios of 1:2.5 direct coupled, and 1:1.79 transformer coupled. TABLE 3 provides a listing of many of these transformers. For further information, contact BTTC at 631-244-7393 or at www.bttc-beta.com.
TABLE 3. BTTC TRANSFORMERS FOR USE WITH MINI-ACE
TRANSFORMER CONFIGURATION Single epoxy transformer, through-hole, 0.625" X 0.625", 0.250" max height Single epoxy transformer, through-hole, 0.625" X 0.625", 0.220" max height. Single epoxy transformer, flat pack, 0.625" X 0.625", 0.275" max height Single epoxy transformer, surface mount, 0.625" X 0.625", 0.275" max height Single epoxy transformer, surface mount, hi-temp solder, 0.625" X 0.625", 0.220" max height. Single epoxy transformer, flat pack, 0.625" X 0.625", 0.150" max height Single epoxy transformer, surface mount, 0.625" X 0.625", 0.150" max height Single epoxy transformer, through hole, transformer coupled only, 0.500" X 0.350", 0.250" max height Dual epoxy transformer, twin stacked, 0.625" X 0.625", 0.280" max height Dual epoxy transformer, twin stacked, surface mount, 0.625" X 0.625", 0.280" max height Dual epoxy transformer, twin stacked, flat pack, 0.625" X 0.625", 0.280" max height Dual epoxy transformer, side by side, through-hole, 0.930" X 0.630", 0.155" max height Dual epoxy transformer, side by side, flat pack, 0.930" X 0.630", 0.155" max height Dual epoxy transformer, side by side, surface mount, 0.930" X 0.630", 0.155" max height Dual epoxy transformer, side by side, surface mount, 1.410" X 0.750", 0.130" max height Single metal transformer, hermetically sealed, flat pack, 0.630" X 0.630", 0.175" max height Single metal transformer, hermetically sealed, surface mount, 0.630" X 0.630", 0.175" max height NOT RECOMMENDED
Notes: 1. DLP-7115 operates to +85C max. All other transformers listed operate to +130C max.
BTTC PART NO. B-3067 B-3226 B-3818 B-3231 B-3227 B-3819 LPB-5014 LPB-5015 B-3229 TST-9007 TST-9017 TST-9027 TLP-1205 TLP-1105 TLP-1005 DLP-7115 (see note1) HLP-6014 HLP-6015 DLP-7014 SLP-8007 SLP-8024
Data Device Corporation www.ddc-web.com
8
BU-65178/65179*/61688*/61689* K-04/05-0
INTERFACE TO MIL-STD-1553 BUS
FIGURE 5 illustrates the interface between the various versions of the Mini-ACE and a MIL-STD-1553 bus. Connections for both direct (short stub) and transformer (long stub) coupling, as well as the nominal peak-to-peak voltage levels at various points (when transmitting), are indicated in the diagram.
SHORT STUB (DIRECT COUPLED) (1:2.5) TX/RX 11.2 Vpp Mini-ACE TX/RX ISOLATION TRANSFORMER 55 55 28 Vpp 1 FT MAX 7 Vpp
DATA BUS Z0
OR
(1:1.79)
LONG STUB (TRANSFORMER COUPLED) 20 FT MAX
(1:1.41) 0.75 Z0 28 Vpp
11.2 Vpp Mini-ACE ISOLATION TRANSFORMER
20 Vpp
7 Vpp
0.75 Z0 COUPLING TRANSFORMER
Z0 NOTES: 1. Z 0 = 70 TO 85 OHMS 2. NOMINAL VOLTAGE LEVELS SHOWN
FIGURE 5. MINIATURE ADVANCED COMMUNICATIONS ENGINE INTERFACE TO MIL-STD-1553 BUS
Data Device Corporation www.ddc-web.com 9 BU-65178/65179*/61688*/61689* K-04/05-0
ORDERING INFORMATION
BU-61588F3-11XX Supplemental Process Requirements: S = Pre-Cap Source Inspection L = Pull Test Q = Pull Test and Pre-Cap Source Inspection K = One Lot Date Code W = One Lot Date Code and Pre-Cap Source Inspection Y = One Lot Date Code and 100% Pull Test Z = One Lot Date Code, Pre-Cap Source Inspection and 100% Pull Test Blank = None of the Above Test Criteria: 0 = Standard Testing 2 = MIL-STD-1760 Amplitude Compliant - Applies to +5 Volt Transceiver Option Only Process Requirements: 0 = Standard DDC processing, no Burn-In (See table on next page) 1 = MIL-PRF-38534 Compliant 2 = B* 3 = MIL-PRF-38534 Compliant with PIND Testing 4 = MIL-PRF-38534 Compliant with Solder Dip 5 = MIL-PRF-38534 Compliant with PIND Testing and Solder Dip 6 = B* with PIND Testing 7 = B* with Solder Dip 8 = B* with PIND Testing and Solder Dip 9 = Standard DDC Processing with Solder Dip, no Burn-In (See table on next page) Temperature Range/Data Requirements: 1 = -55C to +125C 2 = -40C to +85C 3 = 0C to +70C 4 = -55C to +125C with Variables Test Data 5 = -40C to +85C with Variables Test Data 8 = 0C to +70C with Variables Test Data Voltage/Transceiver Option: 0 = No Transceivers 3 = +5 Volts, rise/fall times=100 to 300 ns (-1553B) (See Test Criteria - 1760 Compliant with option -XX2) Package Type: F = 72-Pin Quad Flat Pack P = 81-Pin PGA G = 72-Pin Gull Lead (Contact factory.) Product Type: 65178 = RT Only, 16/12 MHz, 4K RAM 61588 = BC/RT/MT, 16/12 MHz, 4K RAM 65179 = RT/RT_BOOT, 10/12/16/20 MHz, 4K RAM 61688 = BC/RT/MT, 12/16 MHz, 64K RAM 61689 = BC/RT/MT, 10/20 MHz, 64K RAM *Standard DDC Processing with burn-in and full temperature test, see table on next page.
Data Device Corporation www.ddc-web.com
10
BU-65178/65179*/61688*/61689* K-04/05-0
STANDARD DDC PROCESSING FOR HYBRID AND MONOLITHIC HERMETIC PRODUCTS
TEST INSPECTION SEAL TEMPERATURE CYCLE CONSTANT ACCELERATION BURN-IN MIL-STD-883 METHOD(S) 2009, 2010, 2017, and 2032 1014 1010 2001 1015 (note 1), 1030 (note 2) CONDITION(S) -- A and C C 3000g TABLE 1
Notes: 1. For Process Requirement "B*" (refer to ordering information), devices may be non-compliant with MILSTD-883, Test Method 1015, Paragraph 3.2. Contact factory for details. 2. When applicable.
Data Device Corporation www.ddc-web.com
11
BU-65178/65179*/61688*/61689* K-04/05-0

▲Up To Search▲

Price & Availability of BU-61588

	To Download BU-61588 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .